Loading 05_Hardware/TK100_Tonegenerator/TK101_Tonegenerator_Hovedkort/Project Outputs/TK101_Tonegenerator_Hovedkort_2016-10-19.rar 0 → 100644 +148 KiB File added.No diff preview for this file type. View file 05_Hardware/TK100_Tonegenerator/TK101_Tonegenerator_Hovedkort/TK101_Tonegenerator_Hovedkort.PcbDoc −512 B (2.1 MiB) File changed.No diff preview for this file type. View original file View changed file 05_Hardware/TK100_Tonegenerator/TK101_Tonegenerator_Hovedkort/TK101_Tonegenerator_Hovedkort.PrjPcb +112 −12 Original line number Diff line number Diff line Loading @@ -89,18 +89,6 @@ DItemRevisionGUID= GenerateClassCluster=0 DocumentUniqueId= [GeneratedDocument1] DocumentPath=Project Outputs for TK101_Tonegenerator_Hovedkort\BOM\Bill of Materials-TK101_Tonegenerator_Hovedkort.txt DItemRevisionGUID= [GeneratedDocument2] DocumentPath=Project Outputs for TK101_Tonegenerator_Hovedkort\BOM\Bill of Materials-TK101_Tonegenerator_Hovedkort.xls DItemRevisionGUID= [GeneratedDocument3] DocumentPath=Project Outputs for TK101_Tonegenerator_Hovedkort\Design Rule Check - TK101_Tonegenerator_Hovedkort.html DItemRevisionGUID= [Configuration1] Name=Default Configuration ParameterCount=0 Loading Loading @@ -146,6 +134,101 @@ OutputName6=XSpice Netlist OutputDocumentPath6= OutputVariantName6= OutputDefault6=0 OutputType7=CadnetixNetlist OutputName7=Cadnetix Netlist OutputDocumentPath7= OutputVariantName7= OutputDefault7=0 OutputType8=CalayNetlist OutputName8=Calay Netlist OutputDocumentPath8= OutputVariantName8= OutputDefault8=0 OutputType9=EDIF OutputName9=EDIF for PCB OutputDocumentPath9= OutputVariantName9= OutputDefault9=0 OutputType10=EESofNetlist OutputName10=EESof Netlist OutputDocumentPath10= OutputVariantName10= OutputDefault10=0 OutputType11=IntergraphNetlist OutputName11=Intergraph Netlist OutputDocumentPath11= OutputVariantName11= OutputDefault11=0 OutputType12=MentorBoardStationNetlist OutputName12=Mentor BoardStation Netlist OutputDocumentPath12= OutputVariantName12= OutputDefault12=0 OutputType13=MultiWire OutputName13=MultiWire OutputDocumentPath13= OutputVariantName13= OutputDefault13=0 OutputType14=OrCadPCB2Netlist OutputName14=Orcad/PCB2 Netlist OutputDocumentPath14= OutputVariantName14= OutputDefault14=0 OutputType15=PADSNetlist OutputName15=PADS ASCII Netlist OutputDocumentPath15= OutputVariantName15= OutputDefault15=0 OutputType16=Pcad OutputName16=Pcad for PCB OutputDocumentPath16= OutputVariantName16= OutputDefault16=0 OutputType17=PCADnltNetlist OutputName17=PCADnlt Netlist OutputDocumentPath17= OutputVariantName17= OutputDefault17=0 OutputType18=Protel2Netlist OutputName18=Protel2 Netlist OutputDocumentPath18= OutputVariantName18= OutputDefault18=0 OutputType19=ProtelNetlist OutputName19=Protel OutputDocumentPath19= OutputVariantName19= OutputDefault19=0 OutputType20=RacalNetlist OutputName20=Racal Netlist OutputDocumentPath20= OutputVariantName20= OutputDefault20=0 OutputType21=RINFNetlist OutputName21=RINF Netlist OutputDocumentPath21= OutputVariantName21= OutputDefault21=0 OutputType22=SciCardsNetlist OutputName22=SciCards Netlist OutputDocumentPath22= OutputVariantName22= OutputDefault22=0 OutputType23=TangoNetlist OutputName23=Tango Netlist OutputDocumentPath23= OutputVariantName23= OutputDefault23=0 OutputType24=TelesisNetlist OutputName24=Telesis Netlist OutputDocumentPath24= OutputVariantName24= OutputDefault24=0 OutputType25=WireListNetlist OutputName25=WireList Netlist OutputDocumentPath25= OutputVariantName25= OutputDefault25=0 [OutputGroup2] Name=Simulator Outputs Loading Loading @@ -299,6 +382,18 @@ OutputDocumentPath18= OutputVariantName18= OutputDefault18=0 PageOptions18=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 OutputType19=Logic Analyser Print OutputName19=Logic Analyser Prints OutputDocumentPath19= OutputVariantName19= OutputDefault19=0 PageOptions19=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 OutputType20=Software Platform Print OutputName20=Software Platform Prints OutputDocumentPath20= OutputVariantName20= OutputDefault20=0 PageOptions20=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 [OutputGroup4] Name=Assembly Outputs Loading Loading @@ -675,6 +770,11 @@ OutputName4=Export STEP OutputDocumentPath4= OutputVariantName4=[No Variations] OutputDefault4=0 OutputType5=NetList Sch OutputName5=NetList Sch OutputDocumentPath5= OutputVariantName5= OutputDefault5=0 [Modification Levels] Type1=1 Loading Loading
05_Hardware/TK100_Tonegenerator/TK101_Tonegenerator_Hovedkort/Project Outputs/TK101_Tonegenerator_Hovedkort_2016-10-19.rar 0 → 100644 +148 KiB File added.No diff preview for this file type. View file
05_Hardware/TK100_Tonegenerator/TK101_Tonegenerator_Hovedkort/TK101_Tonegenerator_Hovedkort.PcbDoc −512 B (2.1 MiB) File changed.No diff preview for this file type. View original file View changed file
05_Hardware/TK100_Tonegenerator/TK101_Tonegenerator_Hovedkort/TK101_Tonegenerator_Hovedkort.PrjPcb +112 −12 Original line number Diff line number Diff line Loading @@ -89,18 +89,6 @@ DItemRevisionGUID= GenerateClassCluster=0 DocumentUniqueId= [GeneratedDocument1] DocumentPath=Project Outputs for TK101_Tonegenerator_Hovedkort\BOM\Bill of Materials-TK101_Tonegenerator_Hovedkort.txt DItemRevisionGUID= [GeneratedDocument2] DocumentPath=Project Outputs for TK101_Tonegenerator_Hovedkort\BOM\Bill of Materials-TK101_Tonegenerator_Hovedkort.xls DItemRevisionGUID= [GeneratedDocument3] DocumentPath=Project Outputs for TK101_Tonegenerator_Hovedkort\Design Rule Check - TK101_Tonegenerator_Hovedkort.html DItemRevisionGUID= [Configuration1] Name=Default Configuration ParameterCount=0 Loading Loading @@ -146,6 +134,101 @@ OutputName6=XSpice Netlist OutputDocumentPath6= OutputVariantName6= OutputDefault6=0 OutputType7=CadnetixNetlist OutputName7=Cadnetix Netlist OutputDocumentPath7= OutputVariantName7= OutputDefault7=0 OutputType8=CalayNetlist OutputName8=Calay Netlist OutputDocumentPath8= OutputVariantName8= OutputDefault8=0 OutputType9=EDIF OutputName9=EDIF for PCB OutputDocumentPath9= OutputVariantName9= OutputDefault9=0 OutputType10=EESofNetlist OutputName10=EESof Netlist OutputDocumentPath10= OutputVariantName10= OutputDefault10=0 OutputType11=IntergraphNetlist OutputName11=Intergraph Netlist OutputDocumentPath11= OutputVariantName11= OutputDefault11=0 OutputType12=MentorBoardStationNetlist OutputName12=Mentor BoardStation Netlist OutputDocumentPath12= OutputVariantName12= OutputDefault12=0 OutputType13=MultiWire OutputName13=MultiWire OutputDocumentPath13= OutputVariantName13= OutputDefault13=0 OutputType14=OrCadPCB2Netlist OutputName14=Orcad/PCB2 Netlist OutputDocumentPath14= OutputVariantName14= OutputDefault14=0 OutputType15=PADSNetlist OutputName15=PADS ASCII Netlist OutputDocumentPath15= OutputVariantName15= OutputDefault15=0 OutputType16=Pcad OutputName16=Pcad for PCB OutputDocumentPath16= OutputVariantName16= OutputDefault16=0 OutputType17=PCADnltNetlist OutputName17=PCADnlt Netlist OutputDocumentPath17= OutputVariantName17= OutputDefault17=0 OutputType18=Protel2Netlist OutputName18=Protel2 Netlist OutputDocumentPath18= OutputVariantName18= OutputDefault18=0 OutputType19=ProtelNetlist OutputName19=Protel OutputDocumentPath19= OutputVariantName19= OutputDefault19=0 OutputType20=RacalNetlist OutputName20=Racal Netlist OutputDocumentPath20= OutputVariantName20= OutputDefault20=0 OutputType21=RINFNetlist OutputName21=RINF Netlist OutputDocumentPath21= OutputVariantName21= OutputDefault21=0 OutputType22=SciCardsNetlist OutputName22=SciCards Netlist OutputDocumentPath22= OutputVariantName22= OutputDefault22=0 OutputType23=TangoNetlist OutputName23=Tango Netlist OutputDocumentPath23= OutputVariantName23= OutputDefault23=0 OutputType24=TelesisNetlist OutputName24=Telesis Netlist OutputDocumentPath24= OutputVariantName24= OutputDefault24=0 OutputType25=WireListNetlist OutputName25=WireList Netlist OutputDocumentPath25= OutputVariantName25= OutputDefault25=0 [OutputGroup2] Name=Simulator Outputs Loading Loading @@ -299,6 +382,18 @@ OutputDocumentPath18= OutputVariantName18= OutputDefault18=0 PageOptions18=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 OutputType19=Logic Analyser Print OutputName19=Logic Analyser Prints OutputDocumentPath19= OutputVariantName19= OutputDefault19=0 PageOptions19=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 OutputType20=Software Platform Print OutputName20=Software Platform Prints OutputDocumentPath20= OutputVariantName20= OutputDefault20=0 PageOptions20=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 [OutputGroup4] Name=Assembly Outputs Loading Loading @@ -675,6 +770,11 @@ OutputName4=Export STEP OutputDocumentPath4= OutputVariantName4=[No Variations] OutputDefault4=0 OutputType5=NetList Sch OutputName5=NetList Sch OutputDocumentPath5= OutputVariantName5= OutputDefault5=0 [Modification Levels] Type1=1 Loading
