Commit 4b7cb0c8 authored by Øystein Smith's avatar Øystein Smith
Browse files

Teslakomjobbing med Snorre og Ivar

Skrevet litt spec og strukturert driveren
parent 80807147
Bestr av:
TK501 Frontpanel
TK510 Signalbakplan
TK511 DC PSU
TK512 Optisk mottaker
TK513 Limiter
TK514 Interrupter
TK519 Spenningsvakt
TK525 Kraftforsyning
TK520 GDT Trafo
TK530 Kraftbakplan
TK531 Utgangstrinn
TK532 Utgangskondensatorkort
\ No newline at end of file
4U (17,78cm) Hy
Delt i flere deler:
Venstre side
Kortmatrise LEDS
Kortmatrise resten
Hyre side
Kortmatrisefelt:
Bruker hele hyden
1FU per kort i signalbakplanet (1FU = hyden p hyeste element i matrisa (interruptknappen))
Pr. FU:
5 LEDS:
Rd: Kort mangler
Rd: Feil
?: Reserve
Rd/Grnn: Status
Knappled: Interrupt
Navnefelt
Kontrollpanel
Inneholder brytere og potmetere avhengig av kortbehov
Felt for kraftplanet:
3 LEDS for hvert kort i kraftbakplanet
Rd: Kort borte
Rd: Feil
Grnn: OK
Display:
?: Spenning utgangstrinn
Analog: Strm ut
?: Driftstimer x2?
Effektknapper:
Ndstoppbryter: Ndstopp (i serie med spenning inn)
Dekselbryter: Master p (i serie med spenning inn)
Fjrbelastet vribryter: Effektforsyning klar
Nedsenket momentrbryter: Effekt p
Soppmomentrbryter: Effekt av
Soft og hard limit
Grov og finjustering
Grovjustering diskret
\ No newline at end of file
Interruptindikator for alle slemme interrupts
Separat indikator for signalinterrupt
\ No newline at end of file
------------------------------------------------------------
-- VHDL TK500_Driver
-- 2014 6 27 17 54 11
-- 2014 7 5 19 58 30
-- Created By "DXP VHDL Generator"
-- "Copyright (c) 2002-2014 Altium Limited"
-- Product Version: 14.3.10.33625
-- "Copyright (c) 2002-2004 Altium Limited"
------------------------------------------------------------
------------------------------------------------------------
......@@ -20,61 +19,116 @@ End TK500_Driver;
------------------------------------------------------------
------------------------------------------------------------
Architecture Structure Of TK500_Driver Is
Component File_Name -- ObjectKind=Sheet Symbol|PrimaryId=Designator
End Component;
architecture structure of TK500_Driver is
Component TK510_Signalbakplan -- ObjectKind=Sheet Symbol|PrimaryId=TK510
port
(
GATE_DRIVE_A : out STD_LOGIC; -- ObjectKind=Sheet Entry|PrimaryId=TK510_Signalbakplan.SchDoc-GATE DRIVE A
GATE_DRIVE_B : out STD_LOGIC -- ObjectKind=Sheet Entry|PrimaryId=TK510_Signalbakplan.SchDoc-GATE DRIVE B
);
End Component;
Component TK511_DCMINUSPSU -- ObjectKind=Sheet Symbol|PrimaryId=TK511
End Component;
Component TK512_Optisk_Mottaker -- ObjectKind=Sheet Symbol|PrimaryId=TK512
End Component;
Component TK513_Limiter -- ObjectKind=Sheet Symbol|PrimaryId=TK513
End Component;
Component TK514_Interrupter -- ObjectKind=Sheet Symbol|PrimaryId=TK514
Component TK520_GDMINUSTrafo -- ObjectKind=Sheet Symbol|PrimaryId=TK520
port
(
GATE_DRIVE_A : in STD_LOGIC; -- ObjectKind=Sheet Entry|PrimaryId=TK520_GD-Trafo.SchDoc-GATE DRIVE A
GATE_DRIVE_B : in STD_LOGIC; -- ObjectKind=Sheet Entry|PrimaryId=TK520_GD-Trafo.SchDoc-GATE DRIVE B
GDA : out STD_LOGIC; -- ObjectKind=Sheet Entry|PrimaryId=TK520_GD-Trafo.SchDoc-GDA
GDB : out STD_LOGIC; -- ObjectKind=Sheet Entry|PrimaryId=TK520_GD-Trafo.SchDoc-GDB
GDT1_2 : out STD_LOGIC; -- ObjectKind=Sheet Entry|PrimaryId=TK520_GD-Trafo.SchDoc-GDT1_2
GDT2_2 : out STD_LOGIC; -- ObjectKind=Sheet Entry|PrimaryId=TK520_GD-Trafo.SchDoc-GDT2_2
GDT3_1 : out STD_LOGIC; -- ObjectKind=Sheet Entry|PrimaryId=TK520_GD-Trafo.SchDoc-GDT3_1
GDT3_2 : out STD_LOGIC; -- ObjectKind=Sheet Entry|PrimaryId=TK520_GD-Trafo.SchDoc-GDT3_2
GDT4_1 : out STD_LOGIC; -- ObjectKind=Sheet Entry|PrimaryId=TK520_GD-Trafo.SchDoc-GDT4_1
GDT4_2 : out STD_LOGIC -- ObjectKind=Sheet Entry|PrimaryId=TK520_GD-Trafo.SchDoc-GDT4_2
);
End Component;
Component TK520_GDTMINUSTrafo -- ObjectKind=Sheet Symbol|PrimaryId=TK520
Component TK525_Kraftforsyning -- ObjectKind=Sheet Symbol|PrimaryId=TK525
port
(
X_114VAC : out STD_LOGIC; -- ObjectKind=Sheet Entry|PrimaryId=TK525_Kraftforsyning.SchDoc-114VAC
GND_HV : out STD_LOGIC -- ObjectKind=Sheet Entry|PrimaryId=TK525_Kraftforsyning.SchDoc-GND_HV
);
End Component;
Component TK531_Utgangstrinn -- ObjectKind=Sheet Symbol|PrimaryId=TK531_1
Component TK530_Kraftbakplan -- ObjectKind=Sheet Symbol|PrimaryId=TK530
port
(
X_114VAC : in STD_LOGIC; -- ObjectKind=Sheet Entry|PrimaryId=TK530_Kraftbakplan.SchDoc-114VAC
GDT1_1 : in STD_LOGIC; -- ObjectKind=Sheet Entry|PrimaryId=TK530_Kraftbakplan.SchDoc-GDT1_1
GDT1_2 : in STD_LOGIC; -- ObjectKind=Sheet Entry|PrimaryId=TK530_Kraftbakplan.SchDoc-GDT1_2
GDT2_1 : in STD_LOGIC; -- ObjectKind=Sheet Entry|PrimaryId=TK530_Kraftbakplan.SchDoc-GDT2_1
GDT2_2 : in STD_LOGIC; -- ObjectKind=Sheet Entry|PrimaryId=TK530_Kraftbakplan.SchDoc-GDT2_2
GDT3_1 : in STD_LOGIC; -- ObjectKind=Sheet Entry|PrimaryId=TK530_Kraftbakplan.SchDoc-GDT3_1
GDT3_2 : in STD_LOGIC; -- ObjectKind=Sheet Entry|PrimaryId=TK530_Kraftbakplan.SchDoc-GDT3_2
GDT4_1 : in STD_LOGIC; -- ObjectKind=Sheet Entry|PrimaryId=TK530_Kraftbakplan.SchDoc-GDT4_1
GDT4_2 : in STD_LOGIC; -- ObjectKind=Sheet Entry|PrimaryId=TK530_Kraftbakplan.SchDoc-GDT4_2
GND_HV : in STD_LOGIC; -- ObjectKind=Sheet Entry|PrimaryId=TK530_Kraftbakplan.SchDoc-GND_HV
OUTA : out STD_LOGIC; -- ObjectKind=Sheet Entry|PrimaryId=TK530_Kraftbakplan.SchDoc-OUTA
OUTB : out STD_LOGIC -- ObjectKind=Sheet Entry|PrimaryId=TK530_Kraftbakplan.SchDoc-OUTB
);
End Component;
Begin
TK531_2 : TK531_Utgangstrinn -- ObjectKind=Sheet Symbol|PrimaryId=TK531_2
;
TK531_1 : TK531_Utgangstrinn -- ObjectKind=Sheet Symbol|PrimaryId=TK531_1
;
TK520 : TK520_GDTMINUSTrafo -- ObjectKind=Sheet Symbol|PrimaryId=TK520
;
TK514 : TK514_Interrupter -- ObjectKind=Sheet Symbol|PrimaryId=TK514
;
TK513 : TK513_Limiter -- ObjectKind=Sheet Symbol|PrimaryId=TK513
;
TK512 : TK512_Optisk_Mottaker -- ObjectKind=Sheet Symbol|PrimaryId=TK512
;
TK511 : TK511_DCMINUSPSU -- ObjectKind=Sheet Symbol|PrimaryId=TK511
;
Signal PinSignal_TK510_GATE_DRIVE_A : STD_LOGIC; -- ObjectKind=Net|PrimaryId=GATE DRIVE A
Signal PinSignal_TK510_GATE_DRIVE_B : STD_LOGIC; -- ObjectKind=Net|PrimaryId=GATE DRIVE B
Signal PinSignal_TK520_GDA : STD_LOGIC; -- ObjectKind=Net|PrimaryId=GDA
Signal PinSignal_TK520_GDB : STD_LOGIC; -- ObjectKind=Net|PrimaryId=GDB
Signal PinSignal_TK520_GDT1_2 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=GDT1_2
Signal PinSignal_TK520_GDT2_2 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=GDT2_2
Signal PinSignal_TK520_GDT3_1 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=GDT3_1
Signal PinSignal_TK520_GDT3_2 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=GDT3_2
Signal PinSignal_TK520_GDT4_1 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=GDT4_1
Signal PinSignal_TK520_GDT4_2 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=GDT4_2
Signal PinSignal_TK525_114VAC : STD_LOGIC; -- ObjectKind=Net|PrimaryId=114VAC
Signal PinSignal_TK525_GND_HV : STD_LOGIC; -- ObjectKind=Net|PrimaryId=GND_HV
begin
TK530 : TK530_Kraftbakplan -- ObjectKind=Sheet Symbol|PrimaryId=TK530
Port Map
(
X_114VAC => PinSignal_TK525_114VAC, -- ObjectKind=Sheet Entry|PrimaryId=TK530_Kraftbakplan.SchDoc-114VAC
GDT1_1 => PinSignal_TK520_GDA, -- ObjectKind=Sheet Entry|PrimaryId=TK530_Kraftbakplan.SchDoc-GDT1_1
GDT1_2 => PinSignal_TK520_GDT1_2, -- ObjectKind=Sheet Entry|PrimaryId=TK530_Kraftbakplan.SchDoc-GDT1_2
GDT2_1 => PinSignal_TK520_GDB, -- ObjectKind=Sheet Entry|PrimaryId=TK530_Kraftbakplan.SchDoc-GDT2_1
GDT2_2 => PinSignal_TK520_GDT2_2, -- ObjectKind=Sheet Entry|PrimaryId=TK530_Kraftbakplan.SchDoc-GDT2_2
GDT3_1 => PinSignal_TK520_GDT3_1, -- ObjectKind=Sheet Entry|PrimaryId=TK530_Kraftbakplan.SchDoc-GDT3_1
GDT3_2 => PinSignal_TK520_GDT3_2, -- ObjectKind=Sheet Entry|PrimaryId=TK530_Kraftbakplan.SchDoc-GDT3_2
GDT4_1 => PinSignal_TK520_GDT4_1, -- ObjectKind=Sheet Entry|PrimaryId=TK530_Kraftbakplan.SchDoc-GDT4_1
GDT4_2 => PinSignal_TK520_GDT4_2, -- ObjectKind=Sheet Entry|PrimaryId=TK530_Kraftbakplan.SchDoc-GDT4_2
GND_HV => PinSignal_TK525_GND_HV -- ObjectKind=Sheet Entry|PrimaryId=TK530_Kraftbakplan.SchDoc-GND_HV
);
TK525 : TK525_Kraftforsyning -- ObjectKind=Sheet Symbol|PrimaryId=TK525
Port Map
(
X_114VAC => PinSignal_TK525_114VAC, -- ObjectKind=Sheet Entry|PrimaryId=TK525_Kraftforsyning.SchDoc-114VAC
GND_HV => PinSignal_TK525_GND_HV -- ObjectKind=Sheet Entry|PrimaryId=TK525_Kraftforsyning.SchDoc-GND_HV
);
TK520 : TK520_GDMINUSTrafo -- ObjectKind=Sheet Symbol|PrimaryId=TK520
Port Map
(
GATE_DRIVE_A => PinSignal_TK510_GATE_DRIVE_A, -- ObjectKind=Sheet Entry|PrimaryId=TK520_GD-Trafo.SchDoc-GATE DRIVE A
GATE_DRIVE_B => PinSignal_TK510_GATE_DRIVE_B, -- ObjectKind=Sheet Entry|PrimaryId=TK520_GD-Trafo.SchDoc-GATE DRIVE B
GDA => PinSignal_TK520_GDA, -- ObjectKind=Sheet Entry|PrimaryId=TK520_GD-Trafo.SchDoc-GDA
GDB => PinSignal_TK520_GDB, -- ObjectKind=Sheet Entry|PrimaryId=TK520_GD-Trafo.SchDoc-GDB
GDT1_2 => PinSignal_TK520_GDT1_2, -- ObjectKind=Sheet Entry|PrimaryId=TK520_GD-Trafo.SchDoc-GDT1_2
GDT2_2 => PinSignal_TK520_GDT2_2, -- ObjectKind=Sheet Entry|PrimaryId=TK520_GD-Trafo.SchDoc-GDT2_2
GDT3_1 => PinSignal_TK520_GDT3_1, -- ObjectKind=Sheet Entry|PrimaryId=TK520_GD-Trafo.SchDoc-GDT3_1
GDT3_2 => PinSignal_TK520_GDT3_2, -- ObjectKind=Sheet Entry|PrimaryId=TK520_GD-Trafo.SchDoc-GDT3_2
GDT4_1 => PinSignal_TK520_GDT4_1, -- ObjectKind=Sheet Entry|PrimaryId=TK520_GD-Trafo.SchDoc-GDT4_1
GDT4_2 => PinSignal_TK520_GDT4_2 -- ObjectKind=Sheet Entry|PrimaryId=TK520_GD-Trafo.SchDoc-GDT4_2
);
TK510 : TK510_Signalbakplan -- ObjectKind=Sheet Symbol|PrimaryId=TK510
;
Designator : File_Name -- ObjectKind=Sheet Symbol|PrimaryId=Designator
;
Port Map
(
GATE_DRIVE_A => PinSignal_TK510_GATE_DRIVE_A, -- ObjectKind=Sheet Entry|PrimaryId=TK510_Signalbakplan.SchDoc-GATE DRIVE A
GATE_DRIVE_B => PinSignal_TK510_GATE_DRIVE_B -- ObjectKind=Sheet Entry|PrimaryId=TK510_Signalbakplan.SchDoc-GATE DRIVE B
);
End Structure;
end structure;
------------------------------------------------------------
------------------------------------------------------------
-- VHDL TK510_Signalbakplan
-- 2014 6 27 17 54 11
-- 2014 7 5 19 58 30
-- Created By "DXP VHDL Generator"
-- "Copyright (c) 2002-2014 Altium Limited"
-- Product Version: 14.3.10.33625
-- "Copyright (c) 2002-2004 Altium Limited"
------------------------------------------------------------
------------------------------------------------------------
......@@ -14,16 +13,88 @@ Library IEEE;
Use IEEE.std_logic_1164.all;
Entity TK510_Signalbakplan Is
port
(
GATE_DRIVE_A : Out STD_LOGIC; -- ObjectKind=Port|PrimaryId=GATE DRIVE A
GATE_DRIVE_B : Out STD_LOGIC -- ObjectKind=Port|PrimaryId=GATE DRIVE B
);
attribute MacroCell : boolean;
End TK510_Signalbakplan;
------------------------------------------------------------
------------------------------------------------------------
Architecture Structure Of TK510_Signalbakplan Is
architecture structure of TK510_Signalbakplan is
Component TK511_DCMINUSPSU -- ObjectKind=Sheet Symbol|PrimaryId=TK511
End Component;
Component TK512_Optisk_Mottaker -- ObjectKind=Sheet Symbol|PrimaryId=TK512
port
(
CARRIER_DETECT : out STD_LOGIC; -- ObjectKind=Sheet Entry|PrimaryId=TK512_Optisk_Mottaker.SchDoc-CARRIER DETECT
TRIGGER : out STD_LOGIC -- ObjectKind=Sheet Entry|PrimaryId=TK512_Optisk_Mottaker.SchDoc-TRIGGER
);
End Component;
Begin
End Structure;
Component TK513_Limiter -- ObjectKind=Sheet Symbol|PrimaryId=TK513
port
(
LIMIT : out STD_LOGIC; -- ObjectKind=Sheet Entry|PrimaryId=TK513_Limiter.SchDoc-LIMIT
TRIGGER : in STD_LOGIC -- ObjectKind=Sheet Entry|PrimaryId=TK513_Limiter.SchDoc-TRIGGER
);
End Component;
Component TK514_Interrupter -- ObjectKind=Sheet Symbol|PrimaryId=TK514
port
(
GATE_DRIVE_A : out STD_LOGIC; -- ObjectKind=Sheet Entry|PrimaryId=TK514_Interrupter.SchDoc-GATE DRIVE A
GATE_DRIVE_B : out STD_LOGIC; -- ObjectKind=Sheet Entry|PrimaryId=TK514_Interrupter.SchDoc-GATE DRIVE B
LIMIT1 : in STD_LOGIC; -- ObjectKind=Sheet Entry|PrimaryId=TK514_Interrupter.SchDoc-LIMIT1
LIMIT2 : in STD_LOGIC; -- ObjectKind=Sheet Entry|PrimaryId=TK514_Interrupter.SchDoc-LIMIT2
TRIGGER : in STD_LOGIC -- ObjectKind=Sheet Entry|PrimaryId=TK514_Interrupter.SchDoc-TRIGGER
);
End Component;
Signal PinSignal_TK512_CARRIER_DETECT : STD_LOGIC; -- ObjectKind=Net|PrimaryId=CARRIER DETECT
Signal PinSignal_TK512_TRIGGER : STD_LOGIC; -- ObjectKind=Net|PrimaryId=TRIGGER
Signal PinSignal_TK513_LIMIT : STD_LOGIC; -- ObjectKind=Net|PrimaryId=LIMIT
Signal PinSignal_TK514_GATE_DRIVE_A : STD_LOGIC; -- ObjectKind=Net|PrimaryId=GATE DRIVE A
Signal PinSignal_TK514_GATE_DRIVE_B : STD_LOGIC; -- ObjectKind=Net|PrimaryId=GATE DRIVE B
begin
TK514 : TK514_Interrupter -- ObjectKind=Sheet Symbol|PrimaryId=TK514
Port Map
(
GATE_DRIVE_A => PinSignal_TK514_GATE_DRIVE_A, -- ObjectKind=Sheet Entry|PrimaryId=TK514_Interrupter.SchDoc-GATE DRIVE A
GATE_DRIVE_B => PinSignal_TK514_GATE_DRIVE_B, -- ObjectKind=Sheet Entry|PrimaryId=TK514_Interrupter.SchDoc-GATE DRIVE B
LIMIT1 => PinSignal_TK513_LIMIT, -- ObjectKind=Sheet Entry|PrimaryId=TK514_Interrupter.SchDoc-LIMIT1
LIMIT2 => PinSignal_TK512_CARRIER_DETECT, -- ObjectKind=Sheet Entry|PrimaryId=TK514_Interrupter.SchDoc-LIMIT2
TRIGGER => PinSignal_TK512_TRIGGER -- ObjectKind=Sheet Entry|PrimaryId=TK514_Interrupter.SchDoc-TRIGGER
);
TK513 : TK513_Limiter -- ObjectKind=Sheet Symbol|PrimaryId=TK513
Port Map
(
LIMIT => PinSignal_TK513_LIMIT, -- ObjectKind=Sheet Entry|PrimaryId=TK513_Limiter.SchDoc-LIMIT
TRIGGER => PinSignal_TK512_TRIGGER -- ObjectKind=Sheet Entry|PrimaryId=TK513_Limiter.SchDoc-TRIGGER
);
TK512 : TK512_Optisk_Mottaker -- ObjectKind=Sheet Symbol|PrimaryId=TK512
Port Map
(
CARRIER_DETECT => PinSignal_TK512_CARRIER_DETECT, -- ObjectKind=Sheet Entry|PrimaryId=TK512_Optisk_Mottaker.SchDoc-CARRIER DETECT
TRIGGER => PinSignal_TK512_TRIGGER -- ObjectKind=Sheet Entry|PrimaryId=TK512_Optisk_Mottaker.SchDoc-TRIGGER
);
TK511 : TK511_DCMINUSPSU -- ObjectKind=Sheet Symbol|PrimaryId=TK511
;
-- Signal Assignments
---------------------
GATE_DRIVE_A <= PinSignal_TK514_GATE_DRIVE_A; -- ObjectKind=Net|PrimaryId=GATE DRIVE A
GATE_DRIVE_B <= PinSignal_TK514_GATE_DRIVE_B; -- ObjectKind=Net|PrimaryId=GATE DRIVE B
end structure;
------------------------------------------------------------
------------------------------------------------------------
-- VHDL TK511_DCMINUSPSU
-- 2014 6 27 17 54 11
-- 2014 7 5 19 58 30
-- Created By "DXP VHDL Generator"
-- "Copyright (c) 2002-2014 Altium Limited"
-- Product Version: 14.3.10.33625
-- "Copyright (c) 2002-2004 Altium Limited"
------------------------------------------------------------
------------------------------------------------------------
......@@ -20,7 +19,7 @@ End TK511_DCMINUSPSU;
------------------------------------------------------------
------------------------------------------------------------
Architecture Structure Of TK511_DCMINUSPSU Is
architecture structure of TK511_DCMINUSPSU is
Component CAP -- ObjectKind=Part|PrimaryId=C1|SecondaryId=1
port
(
......@@ -133,7 +132,7 @@ Architecture Structure Of TK511_DCMINUSPSU Is
attribute Value of R2 : Label is "10R";
Begin
begin
U1 : LM317T -- ObjectKind=Part|PrimaryId=U1|SecondaryId=1
Port Map
(
......@@ -142,7 +141,7 @@ Begin
X_3 => PowerSignal_VIN -- ObjectKind=Pin|PrimaryId=U1-3
);
RpotCHKOGTNJ : RPot -- ObjectKind=Part|PrimaryId=Rpot|SecondaryId=1
RpotNNRMPWBQ : RPot -- ObjectKind=Part|PrimaryId=Rpot|SecondaryId=1
Port Map
(
X_1 => PinSignal_C4_2, -- ObjectKind=Pin|PrimaryId=Rpot-1
......@@ -191,7 +190,7 @@ Begin
X_2 => NamedIOSignal_X_1 -- ObjectKind=Pin|PrimaryId=J1-2
);
DF01SLUUSVVLA : DF01S -- ObjectKind=Part|PrimaryId=DF01S|SecondaryId=1
DF01SBQBYNKFO : DF01S -- ObjectKind=Part|PrimaryId=DF01S|SecondaryId=1
Port Map
(
X_1 => NamedIOSignal_X_1, -- ObjectKind=Pin|PrimaryId=DF01S-1
......@@ -291,6 +290,6 @@ Begin
PowerSignal_GND <= '0'; -- ObjectKind=Net|PrimaryId=GND
PowerSignal_VIN <= PinSignal_DF01S_3; -- ObjectKind=Net|PrimaryId=VIN
End Structure;
end structure;
------------------------------------------------------------
------------------------------------------------------------
-- VHDL TK512_Optisk_Mottaker
-- 2014 6 27 17 54 11
-- 2014 7 5 19 58 30
-- Created By "DXP VHDL Generator"
-- "Copyright (c) 2002-2014 Altium Limited"
-- Product Version: 14.3.10.33625
-- "Copyright (c) 2002-2004 Altium Limited"
------------------------------------------------------------
------------------------------------------------------------
......@@ -14,13 +13,18 @@ Library IEEE;
Use IEEE.std_logic_1164.all;
Entity TK512_Optisk_Mottaker Is
port
(
CARRIER_DETECT : Out STD_LOGIC; -- ObjectKind=Port|PrimaryId=CARRIER DETECT
TRIGGER : Out STD_LOGIC -- ObjectKind=Port|PrimaryId=TRIGGER
);
attribute MacroCell : boolean;
End TK512_Optisk_Mottaker;
------------------------------------------------------------
------------------------------------------------------------
Architecture Structure Of TK512_Optisk_Mottaker Is
architecture structure of TK512_Optisk_Mottaker is
Component X_1N4148 -- ObjectKind=Part|PrimaryId=D1|SecondaryId=1
port
(
......@@ -69,6 +73,15 @@ Architecture Structure Of TK512_Optisk_Mottaker Is
);
End Component;
Component GP1FAV50RK -- ObjectKind=Part|PrimaryId=U1|SecondaryId=1
port
(
X_1 : inout STD_LOGIC; -- ObjectKind=Pin|PrimaryId=U1-1
X_2 : inout STD_LOGIC; -- ObjectKind=Pin|PrimaryId=U1-2
X_3 : inout STD_LOGIC -- ObjectKind=Pin|PrimaryId=U1-3
);
End Component;
Component JST_2pin -- ObjectKind=Part|PrimaryId=J1|SecondaryId=1
port
(
......@@ -85,30 +98,24 @@ Architecture Structure Of TK512_Optisk_Mottaker Is
);
End Component;
Component Otical_Reciever -- ObjectKind=Part|PrimaryId=U1|SecondaryId=1
port
(
X_1 : inout STD_LOGIC; -- ObjectKind=Pin|PrimaryId=U1-1
X_2 : inout STD_LOGIC; -- ObjectKind=Pin|PrimaryId=U1-2
X_3 : inout STD_LOGIC -- ObjectKind=Pin|PrimaryId=U1-3
);
End Component;
Signal PinSignal_C1_2 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetC1_2
Signal PinSignal_C2_2 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetC2_2
Signal PinSignal_C3_1 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetC3_1
Signal PinSignal_C4_2 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetC4_2
Signal PinSignal_D1_K : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetD1_K
Signal PinSignal_J1_1 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetJ1_1
Signal PinSignal_J3_1 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetJ3_1
Signal PinSignal_L1_1 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetL1_1
Signal PinSignal_U1_3 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU1_3
Signal PinSignal_U2_11 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU2_11
Signal PinSignal_U2_2 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU2_2
Signal PinSignal_U2_6 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU2_6
Signal PowerSignal_GND : STD_LOGIC; -- ObjectKind=Net|PrimaryId=GND
Signal PowerSignal_PLUS5 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=+5
Signal PinSignal_C1_2 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetC1_2
Signal PinSignal_C2_2 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetC2_2
Signal PinSignal_C3_1 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetC3_1
Signal PinSignal_C4_2 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetC4_2
Signal PinSignal_D1_K : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetD1_K
Signal PinSignal_J1_1 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetJ1_1
Signal PinSignal_J3_1 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetJ3_1
Signal PinSignal_L1_1 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetL1_1
Signal PinSignal_U1_3 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU1_3
Signal PinSignal_U2_11 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU2_11
Signal PinSignal_U2_2 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU2_2
Signal PinSignal_U2_6 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU2_6
Signal PowerSignal_GND : STD_LOGIC; -- ObjectKind=Net|PrimaryId=GND
Signal PowerSignal_PLUS5 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=+5
attribute beskrivelse : string;
attribute beskrivelse of U1 : Label is "TOSLINK Reciever";
attribute CaseMINUSEIA : string;
attribute CaseMINUSEIA of R5 : Label is "0805";
......@@ -134,6 +141,15 @@ Architecture Structure Of TK512_Optisk_Mottaker Is
attribute CaseMINUSMetric of C2 : Label is "2012";
attribute CaseMINUSMetric of C1 : Label is "3216";
attribute Database_Table_Name : string;
attribute Database_Table_Name of U1 : Label is "altium";
attribute leverandor : string;
attribute leverandor of U1 : Label is "Farnell";
attribute leverandor_varenr : string;
attribute leverandor_varenr of U1 : Label is "1243863";
attribute Max_Thickness : string;
attribute Max_Thickness of C6 : Label is "1.45 mm";
attribute Max_Thickness of C4 : Label is "1.45 mm";
......@@ -141,6 +157,21 @@ Architecture Structure Of TK512_Optisk_Mottaker Is
attribute Max_Thickness of C2 : Label is "1.45 mm";
attribute Max_Thickness of C1 : Label is "1.9 mm";
attribute navn : string;
attribute navn of U1 : Label is "GP1FAV50RK";
attribute nokkelord : string;
attribute nokkelord of U1 : Label is "Optic, fibre";
attribute pakke_opprettet : string;
attribute pakke_opprettet of U1 : Label is "28.06.2014 18:02:12";
attribute pakke_opprettet_av : string;
attribute pakke_opprettet_av of U1 : Label is "815";
attribute pakketype : string;
attribute pakketype of U1 : Label is "92";
attribute Power : string;
attribute Power of R5 : Label is "0.125 W";
attribute Power of R4 : Label is "0.125 W";
......@@ -148,6 +179,12 @@ Architecture Structure Of TK512_Optisk_Mottaker Is
attribute Power of R2 : Label is "0.125 W";
attribute Power of R1 : Label is "0.125 W";
attribute pris : string;
attribute pris of U1 : Label is "12";
attribute produsent : string;
attribute produsent of U1 : Label is "Sharp";
attribute Rated_Voltage : string;
attribute Rated_Voltage of C6 : Label is "25 V";
attribute Rated_Voltage of C4 : Label is "25 V";
......@@ -155,6 +192,12 @@ Architecture Structure Of TK512_Optisk_Mottaker Is
attribute Rated_Voltage of C2 : Label is "25 V";
attribute Rated_Voltage of C1 : Label is "25 V";
attribute symbol_opprettet : string;
attribute symbol_opprettet of U1 : Label is "28.06.2014 15:42:01";
attribute symbol_opprettet_av : string;
attribute symbol_opprettet_av of U1 : Label is "815";
attribute Technology : string;
attribute Technology of R5 : Label is "SMT";
attribute Technology of R4 : Label is "SMT";
......@@ -193,7 +236,7 @@ Architecture Structure Of TK512_Optisk_Mottaker Is
attribute Value of C1 : Label is "10uF";
Begin
begin
U2 : X_74HC14 -- ObjectKind=Part|PrimaryId=U2|SecondaryId=7
Port Map
(
......@@ -243,7 +286,7 @@ Begin
X_2 => PinSignal_U2_2 -- ObjectKind=Pin|PrimaryId=U2-2
);
U1 : Otical_Reciever -- ObjectKind=Part|PrimaryId=U1|SecondaryId=1
U1 : GP1FAV50RK -- ObjectKind=Part|PrimaryId=U1|SecondaryId=1
Port Map
(
X_1 => PowerSignal_PLUS5, -- ObjectKind=Pin|PrimaryId=U1-1
......@@ -372,8 +415,12 @@ Begin
-- Signal Assignments
---------------------
CARRIER_DETECT <= PinSignal_J3_1; -- ObjectKind=Net|PrimaryId=NetJ3_1
PinSignal_J1_1 <= TRIGGER; -- ObjectKind=Net|PrimaryId=NetJ1_1
PinSignal_J3_1 <= CARRIER_DETECT; -- ObjectKind=Net|PrimaryId=NetJ3_1
PowerSignal_GND <= '0'; -- ObjectKind=Net|PrimaryId=GND
TRIGGER <= PinSignal_J1_1; -- ObjectKind=Net|PrimaryId=NetJ1_1
End Structure;
end structure;
------------------------------------------------------------
------------------------------------------------------------
-- VHDL TK513_Limiter
-- 2014 6 27 17 54 11
-- 2014 7 5 19 58 31
-- Created By "DXP VHDL Generator"
-- "Copyright (c) 2002-2014 Altium Limited"
-- Product Version: 14.3.10.33625
-- "Copyright (c) 2002-2004 Altium Limited"
------------------------------------------------------------
------------------------------------------------------------
......@@ -14,13 +13,18 @@ Library IEEE;
Use IEEE.std_logic_1164.all;