Commit f6c25d1c authored by hanstj's avatar hanstj
Browse files

Prosjektsturktur endret, Amp må endres fra EL34 til KT66

parent 8edf7224
......@@ -40,23 +40,6 @@ PrefsVaultGUID=
PrefsRevisionGUID=
[Document1]
DocumentPath=InkTube_V1.SchDoc
AnnotationEnabled=1
AnnotateStartValue=1
AnnotationIndexControlEnabled=0
AnnotateSuffix=
AnnotateScope=All
AnnotateOrder=0
DoLibraryUpdate=1
DoDatabaseUpdate=1
ClassGenCCAutoEnabled=1
ClassGenCCAutoRoomEnabled=0
ClassGenNCAutoScope=None
DItemRevisionGUID=
GenerateClassCluster=0
DocumentUniqueId=TGOSYJWZ
[Document2]
DocumentPath=InkTube_Parts.SchLib
AnnotationEnabled=1
AnnotateStartValue=1
......@@ -73,24 +56,7 @@ DItemRevisionGUID=
GenerateClassCluster=0
DocumentUniqueId=RKHFEQKO
[Document3]
DocumentPath=Old_InkTube_V1.PcbDoc
AnnotationEnabled=1
AnnotateStartValue=1
AnnotationIndexControlEnabled=0
AnnotateSuffix=
AnnotateScope=All
AnnotateOrder=-1
DoLibraryUpdate=1
DoDatabaseUpdate=1
ClassGenCCAutoEnabled=1
ClassGenCCAutoRoomEnabled=1
ClassGenNCAutoScope=None
DItemRevisionGUID=
GenerateClassCluster=0
DocumentUniqueId=LBYNDBYA
[Document4]
[Document2]
DocumentPath=InkTube_Parts.PcbLib
AnnotationEnabled=1
AnnotateStartValue=1
......@@ -107,23 +73,6 @@ DItemRevisionGUID=
GenerateClassCluster=0
DocumentUniqueId=EOCSKPFF
[Document5]
DocumentPath=Copy of Old_InkTube_V1.PcbDoc
AnnotationEnabled=1
AnnotateStartValue=1
AnnotationIndexControlEnabled=0
AnnotateSuffix=
AnnotateScope=All
AnnotateOrder=-1
DoLibraryUpdate=1
DoDatabaseUpdate=1
ClassGenCCAutoEnabled=1
ClassGenCCAutoRoomEnabled=1
ClassGenNCAutoScope=None
DItemRevisionGUID=
GenerateClassCluster=0
DocumentUniqueId=LSTKSYTJ
[Configuration1]
Name=Sources
ParameterCount=0
......
This diff is collapsed.
Change Component Designator: Old Designator=M? New Designator=M1
Change Component Designator: Old Designator=M? New Designator=M2
Change Component Designator: Old Designator=M? New Designator=M3
Change Component Designator: Old Designator=M? New Designator=M4
Change Component Designator: Old Designator=M? New Designator=M5
Change Component Designator: Old Designator=M? New Designator=M6
Change Component Designator: Old Designator=P? New Designator=P4
Change Component Designator: Old Designator=M? New Designator=M7
Change Component Designator: Old Designator=M? New Designator=M8
Change Component Designator: OldDesignator=P? NewDesignator=P4
Added Component: Designator=M1(Mech_Mounting_M3_ISO_Hole)
Add component (AddParameter): Name = "Checked"; Value = "No"; VariantName = "[No Variations]"
Add component (AddParameter): Name = "Checked By"; Value = ""; VariantName = "[No Variations]"
Add component (AddParameter): Name = "ComponentLink1URL"; Value = ""; VariantName = "[No Variations]"
Add component (AddParameter): Name = "Subtype"; Value = "Mounting Hole"; VariantName = "[No Variations]"
Add component (AddParameter): Name = "Type"; Value = "Mechanical"; VariantName = "[No Variations]"
Added Component: Designator=M2(Mech_Mounting_M3_ISO_Hole)
Add component (AddParameter): Name = "Checked"; Value = "No"; VariantName = "[No Variations]"
Add component (AddParameter): Name = "Checked By"; Value = ""; VariantName = "[No Variations]"
Add component (AddParameter): Name = "ComponentLink1URL"; Value = ""; VariantName = "[No Variations]"
Add component (AddParameter): Name = "Subtype"; Value = "Mounting Hole"; VariantName = "[No Variations]"
Add component (AddParameter): Name = "Type"; Value = "Mechanical"; VariantName = "[No Variations]"
Added Component: Designator=M3(Mech_Mounting_M3_ISO_Hole)
Add component (AddParameter): Name = "Checked"; Value = "No"; VariantName = "[No Variations]"
Add component (AddParameter): Name = "Checked By"; Value = ""; VariantName = "[No Variations]"
Add component (AddParameter): Name = "ComponentLink1URL"; Value = ""; VariantName = "[No Variations]"
Add component (AddParameter): Name = "Subtype"; Value = "Mounting Hole"; VariantName = "[No Variations]"
Add component (AddParameter): Name = "Type"; Value = "Mechanical"; VariantName = "[No Variations]"
Added Component: Designator=M4(Mech_Mounting_M3_ISO_Hole)
Add component (AddParameter): Name = "Checked"; Value = "No"; VariantName = "[No Variations]"
Add component (AddParameter): Name = "Checked By"; Value = ""; VariantName = "[No Variations]"
Add component (AddParameter): Name = "ComponentLink1URL"; Value = ""; VariantName = "[No Variations]"
Add component (AddParameter): Name = "Subtype"; Value = "Mounting Hole"; VariantName = "[No Variations]"
Add component (AddParameter): Name = "Type"; Value = "Mechanical"; VariantName = "[No Variations]"
Added Component: Designator=M5(Mech_Mounting_M3_ISO_Hole)
Add component (AddParameter): Name = "Checked"; Value = "No"; VariantName = "[No Variations]"
Add component (AddParameter): Name = "Checked By"; Value = ""; VariantName = "[No Variations]"
Add component (AddParameter): Name = "ComponentLink1URL"; Value = ""; VariantName = "[No Variations]"
Add component (AddParameter): Name = "Subtype"; Value = "Mounting Hole"; VariantName = "[No Variations]"
Add component (AddParameter): Name = "Type"; Value = "Mechanical"; VariantName = "[No Variations]"
Added Component: Designator=M6(Mech_Mounting_M3_ISO_Hole)
Add component (AddParameter): Name = "Checked"; Value = "No"; VariantName = "[No Variations]"
Add component (AddParameter): Name = "Checked By"; Value = ""; VariantName = "[No Variations]"
Add component (AddParameter): Name = "ComponentLink1URL"; Value = ""; VariantName = "[No Variations]"
Add component (AddParameter): Name = "Subtype"; Value = "Mounting Hole"; VariantName = "[No Variations]"
Add component (AddParameter): Name = "Type"; Value = "Mechanical"; VariantName = "[No Variations]"
Change Class Name : Old Net Name=InkTube_V1 New Net Name=InkTube_Amp_Ch
Added Member To Class: ClassName=InkTube_Amp_Ch Member=Component M1 M3 Isolated Hole
Added Member To Class: ClassName=InkTube_Amp_Ch Member=Component M2 M3 Isolated Hole
Added Member To Class: ClassName=InkTube_Amp_Ch Member=Component M3 M3 Isolated Hole
Added Member To Class: ClassName=InkTube_Amp_Ch Member=Component M4 M3 Isolated Hole
Added Member To Class: ClassName=InkTube_Amp_Ch Member=Component M5 M3 Isolated Hole
Added Member To Class: ClassName=InkTube_Amp_Ch Member=Component M6 M3 Isolated Hole
Added Component: Designator=M7(Mech_Mounting_M3_ISO_Hole)
Add component (AddParameter): Name = "Checked"; Value = "No"; VariantName = "[No Variations]"
Add component (AddParameter): Name = "Checked By"; Value = ""; VariantName = "[No Variations]"
Add component (AddParameter): Name = "ComponentLink1URL"; Value = ""; VariantName = "[No Variations]"
Add component (AddParameter): Name = "Subtype"; Value = "Mounting Hole"; VariantName = "[No Variations]"
Add component (AddParameter): Name = "Type"; Value = "Mechanical"; VariantName = "[No Variations]"
Added Component: Designator=M8(Mech_Mounting_M3_ISO_Hole)
Add component (AddParameter): Name = "Checked"; Value = "No"; VariantName = "[No Variations]"
Add component (AddParameter): Name = "Checked By"; Value = ""; VariantName = "[No Variations]"
Add component (AddParameter): Name = "ComponentLink1URL"; Value = ""; VariantName = "[No Variations]"
Add component (AddParameter): Name = "Subtype"; Value = "Mounting Hole"; VariantName = "[No Variations]"
Add component (AddParameter): Name = "Type"; Value = "Mechanical"; VariantName = "[No Variations]"
Added Member To Class: ClassName=InkTube_Amp_Ch Member=Component M7 M3 Isolated Hole
Added Member To Class: ClassName=InkTube_Amp_Ch Member=Component M8 M3 Isolated Hole
Protel Design System Design Rule Check
PCB File : C:\Users\vtkko\Documents\[Works] Private Projects\inktube\Inktube_Amp_Ch\Inktube_Amp_Ch.PcbDoc
Date : 30/11/2021
Time : 15:59:28
Processing Rule : Clearance Constraint (Gap=2mm) (InNetClass('HV Section')),(All)
Violation between Clearance Constraint: (1.913mm < 2mm) Between Pad Free-2(204.336mm,102.136mm) on Multi-Layer And Pad P4-3(206mm,99mm) on Multi-Layer
Violation between Clearance Constraint: (1.75mm < 2mm) Between Pad P1-1(170mm,99mm) on Multi-Layer And Pad P1-2(173.5mm,99mm) on Multi-Layer
Violation between Clearance Constraint: (1.75mm < 2mm) Between Pad P2-1(250mm,99mm) on Multi-Layer And Pad P2-2(253.5mm,99mm) on Multi-Layer
Violation between Clearance Constraint: (1.75mm < 2mm) Between Pad P3-1(228.5mm,99mm) on Multi-Layer And Pad P3-2(232mm,99mm) on Multi-Layer
Violation between Clearance Constraint: (1.75mm < 2mm) Between Pad P4-1(199mm,99mm) on Multi-Layer And Pad P4-2(202.5mm,99mm) on Multi-Layer
Violation between Clearance Constraint: (1.75mm < 2mm) Between Pad P4-2(202.5mm,99mm) on Multi-Layer And Pad P4-3(206mm,99mm) on Multi-Layer
Violation between Clearance Constraint: (1.75mm < 2mm) Between Pad P4-3(206mm,99mm) on Multi-Layer And Pad P4-4(209.5mm,99mm) on Multi-Layer
Violation between Clearance Constraint: (1.75mm < 2mm) Between Pad P7-1(141mm,99mm) on Multi-Layer And Pad P7-2(144.5mm,99mm) on Multi-Layer
Violation between Clearance Constraint: (1.75mm < 2mm) Between Pad P7-2(144.5mm,99mm) on Multi-Layer And Pad P7-3(148mm,99mm) on Multi-Layer
Violation between Clearance Constraint: (1.291mm < 2mm) Between Pad V2-1(201.247mm,158.186mm) on Multi-Layer And Pad V2-2(203.409mm,161.161mm) on Multi-Layer
Violation between Clearance Constraint: (1.677mm < 2mm) Between Pad V2-2(203.409mm,161.161mm) on Multi-Layer And Pad V2-3(203.409mm,164.839mm) on Multi-Layer
Violation between Clearance Constraint: (1.677mm < 2mm) Between Pad V2-3(203.409mm,164.839mm) on Multi-Layer And Pad V2-4(201.247mm,167.814mm) on Multi-Layer
Violation between Clearance Constraint: (1.677mm < 2mm) Between Pad V2-4(201.247mm,167.814mm) on Multi-Layer And Pad V2-5(197.75mm,168.95mm) on Multi-Layer
Violation between Clearance Constraint: (1.677mm < 2mm) Between Pad V2-5(197.75mm,168.95mm) on Multi-Layer And Pad V2-6(194.253mm,167.814mm) on Multi-Layer
Violation between Clearance Constraint: (1.677mm < 2mm) Between Pad V2-6(194.253mm,167.814mm) on Multi-Layer And Pad V2-7(192.091mm,164.839mm) on Multi-Layer
Violation between Clearance Constraint: (1.677mm < 2mm) Between Pad V2-7(192.091mm,164.839mm) on Multi-Layer And Pad V2-8(192.091mm,161.161mm) on Multi-Layer
Violation between Clearance Constraint: (1.677mm < 2mm) Between Pad V2-8(192.091mm,161.161mm) on Multi-Layer And Pad V2-9(194.253mm,158.186mm) on Multi-Layer
Violation between Clearance Constraint: (1.802mm < 2mm) Between Text "In" (159.4mm,98.4mm) on Top Layer And Track (154.25mm,114.75mm)(170mm,99mm) on Top Layer
Rule Violations :18
Processing Rule : Short-Circuit Constraint (Allowed=No) (All),(All)
Rule Violations :0
Processing Rule : Un-Routed Net Constraint ( (All) )
Violation between Un-Routed Net Constraint: Net CH_L_P Between Track (152.444mm,120.306mm)(153.194mm,120.306mm) on Top Layer And Arc (158.25mm,129.871mm) on Top Layer
Violation between Un-Routed Net Constraint: Net CH_L_N Between Pad Free-2(153.3mm,115.5mm) on Multi-Layer And Track (160.75mm,123.25mm)(163.038mm,125.538mm) on Top Layer
Violation between Un-Routed Net Constraint: Net Pre_L_H Between Pad Free-2(165mm,144.81mm) on Multi-Layer And Track (209mm,144mm)(209.25mm,143.75mm) on Top Layer
Violation between Un-Routed Net Constraint: Net CH_L_P Between Pad Free-2(171.25mm,142mm) on Multi-Layer And Pad Free-2(178mm,142mm) on Multi-Layer
Violation between Un-Routed Net Constraint: Net PWR_A Between Pad Free-3(198.283mm,116.549mm) on Multi-Layer And Pad Free-2(198.75mm,102.013mm) on Multi-Layer
Violation between Un-Routed Net Constraint: Net PWR_B Between Pad Free-2(204.336mm,102.136mm) on Multi-Layer And Pad Free-2(204.9mm,116.3mm) on Multi-Layer
Violation between Un-Routed Net Constraint: Net GND Between Track (209.5mm,102.25mm)(209.5mm,102.25mm) on Top Layer And Pad Free-2(210.077mm,115.101mm) on Multi-Layer
Violation between Un-Routed Net Constraint: Net Amp_Pull_Screen_L Between Pad Free-2(239.712mm,140.5mm) on Multi-Layer And Track (253mm,140.223mm)(253.5mm,140.25mm) on Top Layer
Violation between Un-Routed Net Constraint: Net NetC4_2 Between Track (228.2mm,138.95mm)(229.25mm,140mm) on Top Layer And Pad R10-1(230mm,141mm) on Multi-Layer
Violation between Un-Routed Net Constraint: Net Amp_Cath._L Between Track (169.642mm,187.383mm)(174.174mm,182.851mm) on Top Layer And Pad V1-8(174.597mm,162.933mm) on Multi-Layer
Rule Violations :10
Processing Rule : Modified Polygon (Allow modified: No), (Allow shelved: No)
Rule Violations :0
Processing Rule : Width Constraint (Min=0.25mm) (Max=500mm) (Preferred=0.5mm) (InNetClass('HV Section'))
Rule Violations :0
Processing Rule : Width Constraint (Min=0.25mm) (Max=500mm) (Preferred=0.5mm) (InNetClass('HV Section'))
Rule Violations :0
Processing Rule : Power Plane Connect Rule(Relief Connect )(Expansion=0.508mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All)
Rule Violations :0
Processing Rule : Minimum Annular Ring (Minimum=0.254mm) (All)
Violation between Minimum Annular Ring: (0.25mm < 0.254mm) Pad C1-1(160mm,139.81mm) on Multi-Layer (Annular Ring=0.25mm) On (Top Layer)
Violation between Minimum Annular Ring: (0.25mm < 0.254mm) Pad C1-2(160mm,132.19mm) on Multi-Layer (Annular Ring=0.25mm) On (Top Layer)
Violation between Minimum Annular Ring: (0.25mm < 0.254mm) Pad C2-1(215.25mm,128.69mm) on Multi-Layer (Annular Ring=0.25mm) On (Top Layer)
Violation between Minimum Annular Ring: (0.25mm < 0.254mm) Pad C2-2(215.25mm,136.31mm) on Multi-Layer (Annular Ring=0.25mm) On (Top Layer)
Violation between Minimum Annular Ring: (0.25mm < 0.254mm) Pad C3-1(183.75mm,117.94mm) on Multi-Layer (Annular Ring=0.25mm) On (Top Layer)
Violation between Minimum Annular Ring: (0.25mm < 0.254mm) Pad C3-2(183.75mm,125.56mm) on Multi-Layer (Annular Ring=0.25mm) On (Top Layer)
Violation between Minimum Annular Ring: (0.25mm < 0.254mm) Pad C4-1(222mm,127.39mm) on Multi-Layer (Annular Ring=0.25mm) On (Top Layer)
Violation between Minimum Annular Ring: (0.25mm < 0.254mm) Pad C4-2(222mm,135.01mm) on Multi-Layer (Annular Ring=0.25mm) On (Top Layer)
Violation between Minimum Annular Ring: (0.25mm < 0.254mm) Pad C5-1(235.5mm,132.94mm) on Multi-Layer (Annular Ring=0.25mm) On (Top Layer)
Violation between Minimum Annular Ring: (0.25mm < 0.254mm) Pad C5-2(235.5mm,140.56mm) on Multi-Layer (Annular Ring=0.25mm) On (Top Layer)
Violation between Minimum Annular Ring: (0.25mm < 0.254mm) Pad P1-1(170mm,99mm) on Multi-Layer (Annular Ring=0.25mm) On (Top Layer)
Violation between Minimum Annular Ring: (0.25mm < 0.254mm) Pad P1-2(173.5mm,99mm) on Multi-Layer (Annular Ring=0.25mm) On (Top Layer)
Violation between Minimum Annular Ring: (0.25mm < 0.254mm) Pad P2-1(250mm,99mm) on Multi-Layer (Annular Ring=0.25mm) On (Top Layer)
Violation between Minimum Annular Ring: (0.25mm < 0.254mm) Pad P2-2(253.5mm,99mm) on Multi-Layer (Annular Ring=0.25mm) On (Top Layer)
Violation between Minimum Annular Ring: (0.25mm < 0.254mm) Pad P3-1(228.5mm,99mm) on Multi-Layer (Annular Ring=0.25mm) On (Top Layer)
Violation between Minimum Annular Ring: (0.25mm < 0.254mm) Pad P3-2(232mm,99mm) on Multi-Layer (Annular Ring=0.25mm) On (Top Layer)
Violation between Minimum Annular Ring: (0.25mm < 0.254mm) Pad P4-1(199mm,99mm) on Multi-Layer (Annular Ring=0.25mm) On (Top Layer)
Violation between Minimum Annular Ring: (0.25mm < 0.254mm) Pad P4-2(202.5mm,99mm) on Multi-Layer (Annular Ring=0.25mm) On (Top Layer)
Violation between Minimum Annular Ring: (0.25mm < 0.254mm) Pad P4-3(206mm,99mm) on Multi-Layer (Annular Ring=0.25mm) On (Top Layer)
Violation between Minimum Annular Ring: (0.25mm < 0.254mm) Pad P4-4(209.5mm,99mm) on Multi-Layer (Annular Ring=0.25mm) On (Top Layer)
Violation between Minimum Annular Ring: (0.25mm < 0.254mm) Pad P7-1(141mm,99mm) on Multi-Layer (Annular Ring=0.25mm) On (Top Layer)
Violation between Minimum Annular Ring: (0.25mm < 0.254mm) Pad P7-2(144.5mm,99mm) on Multi-Layer (Annular Ring=0.25mm) On (Top Layer)
Violation between Minimum Annular Ring: (0.25mm < 0.254mm) Pad P7-3(148mm,99mm) on Multi-Layer (Annular Ring=0.25mm) On (Top Layer)
Rule Violations :23
Processing Rule : Hole Size Constraint (Min=0.025mm) (Max=2.54mm) (All)
Violation between Hole Size Constraint: (3.3mm > 2.54mm) Pad M1-1(267mm,138mm) on Multi-Layer Actual Hole Size = 3.3mm
Violation between Hole Size Constraint: (3.3mm > 2.54mm) Pad M2-1(271mm,201mm) on Multi-Layer Actual Hole Size = 3.3mm
Violation between Hole Size Constraint: (3.3mm > 2.54mm) Pad M3-1(212mm,200mm) on Multi-Layer Actual Hole Size = 3.3mm
Violation between Hole Size Constraint: (3.3mm > 2.54mm) Pad M4-1(187mm,200mm) on Multi-Layer Actual Hole Size = 3.3mm
Violation between Hole Size Constraint: (3.3mm > 2.54mm) Pad M5-1(122mm,200mm) on Multi-Layer Actual Hole Size = 3.3mm
Violation between Hole Size Constraint: (3.3mm > 2.54mm) Pad M6-1(123mm,131mm) on Multi-Layer Actual Hole Size = 3.3mm
Violation between Hole Size Constraint: (3.2mm > 2.54mm) Pad V1-(133mm,172.5mm) on Multi-Layer Actual Hole Size = 3.2mm
Violation between Hole Size Constraint: (28mm > 2.54mm) Pad V1-(151.5mm,172.5mm) on Multi-Layer Actual Hole Size = 28mm
Violation between Hole Size Constraint: (3.2mm > 2.54mm) Pad V1-(170mm,172.5mm) on Multi-Layer Actual Hole Size = 3.2mm
Violation between Hole Size Constraint: (3.2mm > 2.54mm) Pad V3-(225.5mm,172.5mm) on Multi-Layer Actual Hole Size = 3.2mm
Violation between Hole Size Constraint: (28mm > 2.54mm) Pad V3-(244mm,172.5mm) on Multi-Layer Actual Hole Size = 28mm
Violation between Hole Size Constraint: (3.2mm > 2.54mm) Pad V3-(262.5mm,172.5mm) on Multi-Layer Actual Hole Size = 3.2mm
Rule Violations :12
Processing Rule : Hole To Hole Clearance (Gap=0.254mm) (All),(All)
Rule Violations :0
Processing Rule : Minimum Solder Mask Sliver (Gap=0.254mm) (All),(All)
Rule Violations :0
Processing Rule : Silk To Solder Mask (Clearance=0.254mm) (IsPad),(All)
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad Free-2(198.75mm,102.013mm) on Multi-Layer And Text "P4" (196.926mm,101.397mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.15mm < 0.254mm) Between Pad R10-1(230mm,141mm) on Multi-Layer And Track (230mm,132.538mm)(230mm,139.875mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.15mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.145mm < 0.254mm) Between Pad R10-2(230mm,121mm) on Multi-Layer And Track (230mm,122.12mm)(230mm,123.27mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.145mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.145mm < 0.254mm) Between Pad R10-2(230mm,121mm) on Multi-Layer And Track (230mm,122.12mm)(230mm,123.27mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.145mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.15mm < 0.254mm) Between Pad R1-1(189.75mm,140.5mm) on Multi-Layer And Track (189.75mm,132.038mm)(189.75mm,139.375mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.15mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.145mm < 0.254mm) Between Pad R1-2(189.75mm,120.5mm) on Multi-Layer And Track (189.75mm,121.62mm)(189.75mm,122.77mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.145mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.145mm < 0.254mm) Between Pad R1-2(189.75mm,120.5mm) on Multi-Layer And Track (189.75mm,121.62mm)(189.75mm,122.77mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.145mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.15mm < 0.254mm) Between Pad R15-1(196.5mm,120.25mm) on Multi-Layer And Track (196.5mm,121.375mm)(196.5mm,128.712mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.15mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.145mm < 0.254mm) Between Pad R15-2(196.5mm,140.25mm) on Multi-Layer And Track (196.5mm,137.98mm)(196.5mm,139.13mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.145mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.145mm < 0.254mm) Between Pad R15-2(196.5mm,140.25mm) on Multi-Layer And Track (196.5mm,137.98mm)(196.5mm,139.13mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.145mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.15mm < 0.254mm) Between Pad R3-1(203.205mm,140.491mm) on Multi-Layer And Track (203.205mm,132.029mm)(203.205mm,139.366mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.15mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.145mm < 0.254mm) Between Pad R3-2(203.205mm,120.491mm) on Multi-Layer And Track (203.205mm,121.611mm)(203.205mm,122.761mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.145mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.145mm < 0.254mm) Between Pad R3-2(203.205mm,120.491mm) on Multi-Layer And Track (203.205mm,121.611mm)(203.205mm,122.761mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.145mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.15mm < 0.254mm) Between Pad R4-1(209.25mm,140.5mm) on Multi-Layer And Track (209.25mm,132.038mm)(209.25mm,139.375mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.15mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.145mm < 0.254mm) Between Pad R4-2(209.25mm,120.5mm) on Multi-Layer And Track (209.25mm,121.62mm)(209.25mm,122.77mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.145mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.145mm < 0.254mm) Between Pad R4-2(209.25mm,120.5mm) on Multi-Layer And Track (209.25mm,121.62mm)(209.25mm,122.77mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.145mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.15mm < 0.254mm) Between Pad R6-1(166.75mm,120.5mm) on Multi-Layer And Track (166.75mm,121.625mm)(166.75mm,128.962mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.15mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.145mm < 0.254mm) Between Pad R6-2(166.75mm,140.5mm) on Multi-Layer And Track (166.75mm,138.23mm)(166.75mm,139.38mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.145mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.145mm < 0.254mm) Between Pad R6-2(166.75mm,140.5mm) on Multi-Layer And Track (166.75mm,138.23mm)(166.75mm,139.38mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.145mm]
Rule Violations :19
Processing Rule : Silk to Silk (Clearance=0.254mm) (All),(All)
Rule Violations :0
Processing Rule : Net Antennae (Tolerance=0mm) (All)
Violation between Net Antennae: Track (228.2mm,138.95mm)(229.25mm,140mm) on Top Layer
Rule Violations :1
Processing Rule : Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All)
Violation between Height Constraint: Component V1-EL34 (151.5mm,172.5mm) on Top Layer Actual Height = 106.75mm
Violation between Height Constraint: Component V2-7199 (197.75mm,163mm) on Top Layer Actual Height = 124mm
Violation between Height Constraint: Component V3-EL34 (244mm,172.5mm) on Top Layer Actual Height = 106.75mm
Rule Violations :3
Violations Detected : 86
Waived Violations : 0
Time Elapsed : 00:00:01
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